Silicon Photonics Test and Alignment

The need for higher performance computing and data-communication speed has led to the advent of silicon photonics. In addition, to higher performance, silicon photonics can also reduce the power requirements of next generation server farms significantly.



With the advantages, this new technology also brings about several production challenges, including the need for test platforms for testing of wafers / components prior to wafer dicing, analogous to conventional electrical-test wafer probing, but in the optical domain. Similarly, downstream packaging processes are more exacting and complex than ever.

Read IBM article “Silicon Integrated Nanophotonics Technology: from the Lab to the Fab”.


Multiple Alignments Quickly

Since many classes of components have one or more inputs plus one or more outputs, and each of these needs to be aligned to nanoscale accuracies in order for test or packaging processes to proceed, it quickly becomes uneconomical to use traditional alignment techniques in a sequential fashion. Plus, the multiple couplings often interact, especially in the case of short waveguides. So a global, parallel, simultaneous alignment-optimization solution is needed.

    High Performance Controller with “Hybrid” Alignment System

    A solution is demonstrated with PI’s E-712 photonics alignment controller and F-131 Fast Fiber Alignment system, a hybrid approach, where a coarse position is approached with a compact motorized positioning device integrated with a high-speed piezo mechanism. The video below demonstrates the capabilities. In this demo, an in-wafer, grating-coupled waveguide device is simulated by a short length of single-mode fiber. Its input and output are coupled via lensed fibers mounted on grippers on PI’s Nanocube XYZ high-speed piezo scanner, which is controlled by the E-712 controller.

    As the video demonstrates, the system is capable of extremely fast characterization and alignment speeds, and alignments in multiple degrees of freedom on the inputs and outputs are achieved in parallel. In fact, system throughput is virtually independent of the number of inputs and outputs. The system provides 25mm of XYZ motorized travel and 100 microns of XYZ high-speed travel with nanometer resolution, all closed-loop and limitable for device safety.

    • Fast, fab-worthy alignment from wafer to package
    • Nanoscale alignment accuracy
    • Sub-second typical scan and alignment times
    • Any number of channels and degrees of freedom
    • Built-in scan and align algorithms
    • No external compute resources
    • Automatic alignment of upright and tilted SM, MM & top-hat couplings
    • Integrated data recorder
    • LANTCP/IP-compatible interface
    • Simultaneous fast alignment across multiple inputs & outputs
    • Real-time, simultaneous tracking
    • Ideal for planar test, packaging, characterization…
    • Comprehensive software resources: host software, drivers for most programming languages, sample code, intelligent tools
    • Platform-independent design
    • High-level ASCII command set
    • Easy implementation

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